Introduction & Number System

• Number Systems: Binary, Octal, Decimal, Hexadecimal – conversion and representation.
• Signed Numbers: Represented using 1’s complement and 2’s complement.
• Digital Logic Relevance: All digital systems operate internally using binary numbers.

Logic Design

• Logic Gates: AND, OR, NOT, NAND, NOR, XOR, XNOR.
• Truth Tables & Timing Diagrams: Used to describe gate behavior.
• Universal Gates: NAND and NOR can be used to implement any logic function.

Boolean Algebra

• Key Laws: Associative, distributive, DeMorgan’s laws.
• Karnaugh Maps (K-Maps): Used for logic simplification.
• Purpose: Minimize logic to build more efficient circuits.

Combinational Circuits

• Circuits that do not store past input (memory-less).
• Examples:
  • Half Adders and Full Adders
  • Multiplexers (MUX)
  • Demultiplexers (DEMUX)
  • Encoders and Decoders

More Combinational Circuits

• ALU: Performs arithmetic and logic operations.
• Comparators: Compare binary inputs and give relational outputs.
• Parity Generators/Checkers: Detect errors in data transmission.

Sequential Circuits

• Circuits that have memory and change output based on current input and past states.
• Flip-Flops: SR, JK, D, and T types – store one bit of information.
• Registers & Counters: Used for data storage and sequencing.
• Clocking: Edge-triggered to synchronize circuit changes.

Switch Debounce

• Mechanical switches can generate multiple unwanted transitions (bounces).
• Debouncing Techniques:
  • RC (Resistor-Capacitor) Circuit
  • SR Flip-Flop
  • Software Logic

Timing Analysis

• Setup Time: Minimum time before clock edge that data must be stable.
• Hold Time: Minimum time after clock edge that data must remain stable.
• Propagation Delay: Time taken for input change to affect output.
• Metastability: Unstable state when setup/hold times are violated.

Semiconductors

• Types:
  • Intrinsic: Pure semiconductors (e.g., silicon without impurities).
  • Extrinsic: Doped semiconductors (N-type and P-type).
• Doping: Adds impurities to control conductivity.
  • N-type: Extra electrons.
  • P-type: Electron holes (positive charge carriers).
• Diodes and Transistors: Fundamental for switching and amplification in circuits.

BJT (Bipolar Junction Transistor)

• Terminals: Emitter, Base, Collector.
• Function: Used for amplification and switching applications.

FET (Field Effect Transistor)

• MOSFET: Metal-Oxide-Semiconductor FET, most common in VLSI.
• CMOS: Combines PMOS and NMOS transistors.
  • Advantage: High power efficiency and scalability.

FPGA Introduction and Architecture

• FPGA: Field-Programmable Gate Array – integrated circuit that can be configured after manufacturing.
• Key Components:
  • CLBs: Configurable Logic Blocks – basic logic elements.
  • LUTs: Look-Up Tables – implement logic functions.
  • Flip-Flops: Provide storage elements.
  • Interconnects: Programmable routing paths.
  • I/O Blocks: Handle external input/output.
• Advantage: Reconfigurable hardware ideal for rapid prototyping and even final production systems.

Typical Design Flow

• Steps Involved:
  • RTL Coding (Register Transfer Level)
  • Simulation
  • Synthesis
  • Implementation on FPGA

Hierarchical Modelling

• Top-Down Design: Break the system into smaller, manageable modules.
• Module Instantiation: Reuse and organize code for better clarity and maintainability.

Basic Concepts

• Verilog Data Types:
  • wire – for combinational connections
  • reg – for storage elements
  • integer – for loop counters and variables
• Operators: Arithmetic, relational, logical, and bitwise operators.

Modules and Ports

• Module Definition Syntax: module name (input, output);
• Ports: Directional I/O signals including input, output, and inout.

Gate-Level Modelling

• Uses built-in Verilog primitives like and, or, not.
• Primarily for educational purposes; rarely used in real-world design.

Dataflow Modelling

• Uses assign statements for continuous assignments.
• Describes logic through Boolean expressions.

Behavioral Modelling

• Uses always and initial blocks.
• Supports constructs like if-else, case, and loops.
• Best suited for algorithmic and sequential behavior description.

Combinational Circuits Design

• Designs without memory: e.g., Adders, Multiplexers, Decoders.
• Sensitivity List: Use always @(*) for modeling pure combinational logic.

Introduction to CMOS

• Follow CMOS Design Rules for layout.
• Basic CMOS Inverter Design.
• Understand Power Dissipation and Scaling effects.
• Learn logic-level implementation and layout techniques.

Sequential Circuits Design

• Designs based on flip-flops using Verilog.
• Synchronous Design: All operations triggered by a common clock.
• FSMs (Finite State Machines): Useful for modeling system behavior over time.