Very-Large-Scale Integration - Hybrid

Very-large-scale integration (VLSI) is the process of creating an integrated circuit (IC) by combining millions of MOS transistors onto a single chip

2/100 Seats
DURATION

2 Months

SKILL

Beginner

LECTURES

30 Hrs Live Sessions

ENROLLED

2

  • Program Duration: 3.5 months
  • 25+ Hours of Content
  • 4 Projects
  • Live Sessions During Project Execution & Training
  • Microsoft Certification
  • Internship Offer Letter
  • Internship Completion Certificate
  • Project Report
  • Fee is applicable only for the platform and Microsoft certification examination
  • Program Duration: 2 months
  • 2 Projects
  • 30+ Hours of content
  • Internship Offer Letter
  • Internship Completion Certificate
  • Program Completion Certficate
  • Fee is applicable only for the platform

What Will I Learn?

  • Logic Design (LD)
  • HDL/RTL/HVL Coding
  • CMOS fundamentals
  • EDA Tools
  • Computer Architecture/ Microprocessor Basics
  • Protocol/Algorithm implementation
  • Timing Analysis

Career Options

  • VLSI FRONT END ENGINEER
  • VLSI BACK END ENGINEER
Program Description

BAISC VERILOG TOPICS:-
1. Overview of digital design with verily HDL
2. Hierarchical Modeling concepts
3. Basic Concepts
4. Modules & Ports
Pre-Rrequisite

  • ●A PC/Mobile phone to attend the class
  • ●A stable internet connection of at least 1Mbps (Recommended: 2 Mbps)
  • ●Headphone and Microphone
  • ●A quiet room or surrounding to attend the class.
Certification

Program Index

Orientation
  • Introduction

  • Overview of VLSI course

  • Evolution if VLSI

  • VLSI Design Flow

Introduction to Digital World
  • Introduction, Number System

  • Logic Design

  • Boolean Algebra

  • Combinational Circuits

  • More Combinational Circuits

  • Sequential Circuits

Introduction to Semiconductors
  • Semiconductors, BJT, FET

Introduction to FPGA
  • Introduction and Architecture

Introduction to Digital Design with Verilog HDL
  • Typical Design Flow

  • Hierarchy Modelling

  • Basic Concepts

  • Modules and Ports

  • Gate-Level Modelling

  • Dataflow Modelling

  • Behavioural Modelling

  • Combinational circuits design

  • Introduction to CMOS and

  • Sequential circuits design"

PROJECTS
  • Digital Design

  • Image Processing on FPGA
  • Program Duration: 3.5 months
  • 25+ Hours of Content
  • 4 Projects
  • Live Sessions During Project Execution & Training
  • Microsoft Certification
  • Internship Offer Letter
  • Internship Completion Certificate
  • Project Report
  • Fee is applicable only for the platform and Microsoft certification examination
  • Program Duration: 2 months
  • 2 Projects
  • 30+ Hours of content
  • Internship Offer Letter
  • Internship Completion Certificate
  • Program Completion Certficate
  • Fee is applicable only for the platform